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V1 z10 MF LPAR RNI and Cache
VIEW 1 of 7: V1 z10 LPAR – RNI Workload Hint and L1 Cache Miss Pct

V1 z10 LPAR – RNI Workload Hint and L1 Cache Miss Pct

Left Y axis

Workload Hint (Low-1 Avg-2 High-3)
CML1RNI – V1 Relative Nest Intensity
CMLPCL1M – Pct Level 1 Cache Miss
Workload Hint Reference Area – shaded gray from 1-3

X axis

DATEHHMM – Date: Hour : Minute

VIEW 2 of 7: V1 z10 LPAR – L1 Cache Miss Sourcing Percentages

V1 z10 LPAR – L1 Cache Miss Sourcing Percentages

Left Y axis

CML1PC15 – V1 PCT L1 from L1.5
CML1PC2A – V1 PCT L1 from L2 On-Bk
CML1PC2B – V1 PCT L1 from L2 Off-Bk
CML1PC3A – V1 PCT L1 from Local Memory
CML1PC3B – V1 PCT L1 from Remote Memory

Right Y axis

AVGPCBSY – Avg IPU Busy for LPAR
CMLPCL1M – Pct Level 1 Cache Miss

X axis

DATEHHMM – Date: Hour : Minute

VIEW 3 of 7: V1 z10 LPAR – L1 Data Cache Miss Sourcing Percentages

V1 z10 LPAR – L1 Data Cache Miss Sourcing Percentages

Left Y axis

CML1PD15 – V1 PCT L1-D from L1.5
CML1PD2A – V1 PCT L1-D from L2 On-Bk
CML1PD2B – V1 PCT L1-D from L2 Off-Bk
CML1PD3A – V1 PCT L1-D from Local Memory
CML1PD3B – V1 PCT L1-D from Remote Memory

Right Y axis

AVGPCBSY – Avg IPU Busy for LPAR
CMLPCL1M – Pct Level 1 Cache Miss

X axis

DATEHHMM – Date: Hour : Minute

VIEW 4 of 7: V1 z10 LPAR – L1 Instruction Cache Miss Sourcing Percentages

V1 z10 LPAR – L1 Instruction Cache Miss Sourcing Percentages

Left Y axis

CML1PI15 – V1 PCT L1-I from L1.5
CML1PI2A – V1 PCT L1-I from L2 On-Bk
CML1PI2B – V1 PCT L1-I from L2 Off-Bk
CML1PI3A – V1 PCT L1-I from Local Memory
CML1PI3B – V1 PCT L1-I from Remote Memory

Right Y axis

AVGPCBSY – Avg IPU Busy for LPAR
CMLPCL1M – Pct Level 1 Cache Miss

X axis

DATEHHMM – Date: Hour : Minute

VIEW 5 of 7: V1 z10 LPAR Penalty Cycles and Avg Penalty per L1 Miss

V1 z10 LPAR Penalty Cycles and Avg Penalty per L1 Miss

Left Y axis

CMLB3 – Total L1 I-Cache Penalty Cycles
CMLB5 – Total L1 D-Cache Penalty Cycles

Right Y axis

CML1AVPM – V1 Avg Penalty Cycles per L1 Miss
CML1AVPD – V1 Avg Penalty Cycles per L1 D-Miss
CML1AVPI – V1 Avg Penalty Cycles per L1 I-Miss

X axis

DATEHHMM – Date: Hour : Minute

VIEW 6 of 7: V1 z10 LPAR – Realized MIPS and Avg IPU Count

V1 z10 LPAR – Realized MIPS and Avg IPU Count

Left Y axis

CMLMIPS – Actual MIPS Usage Rate

Right Y axis

CMLAVIPU – Average Processor Count

X axis

DATEHHMM – Date: Hour : Minute

VIEW 7 of 7: V1 z10 LPAR – Instruction Count and CPI

V1 z10 LPAR – Instruction Count and CPI

Left Y axis

CMLP33 – P33-ProbSt Instructions
CMLS33 – SuperV-State Instructions

Right Y axis

CMLCPI – Cycles per Instrucion
CPI_P – Cycles per Instruction Problem State
CPI_S – Cycles per Instruction Supervisor State

X axis

DATEHHMM – Date: Hour : Minute