2. PERFORMANCE REPORTING ANALYSIS › 2.6 PR/SM LPAR Performance Analysis › 2.6.4 Usage Guidelines › 2.6.4.2 LPAR Interaction Analysis

2.6.4.2 LPAR Interaction Analysis

When executing in LPAR mode, MVS/XA or ESA can provide
measurements that cover activity within the LPAR along with
overall activity of the other active LPARs.  With PR/SM,
many, if not all, of the effects of sharing a physical
complex among multiple SCPs can be characterized with
measurement data from a single source.

Since memory and channel paths are dedicated to individual
LPARs, analyzing resource utilization is largely unchanged
when compared to non-PR/SM operations.  The single exception
is in the measurements of the activity of the I/O Processor
(IOP) of a 3090 CEC.  These are global to the IOP and,
therefore, apply to the sum of the activity of all active
LPARs.  There is no direct way to determine the load on the
IOP imposed by a particular LPAR.

As long as the demand for logical processor resources is less
than the availability of CPs, the activity in one LPAR will
have little or no impact on other LPARs.  It is only during
periods of contention for processor resources that
inter-partition effects can be expected.

The most obvious effect of contention is that less work being
done by the CPs than would have been done in a non-PR/SM
complex because PR/SM prioritizes LPAR access to CPs based on
the relative weights specified by the user for each active
LPAR in the complex.  The relative share of processor
resources available to each LPAR can be controlled by
modifying the relative weights.

The processing weights for each LPAR are set when the LPAR is
defined, and may be modified for an active partition at any
time by the console operator.  Their actual numeric values
are meaningful only when compared to each other.  Before
being applied, the weight is divided by the number of active
logical processors for the LPAR.  The weights are then
applied to the sum of the activity of all logical processors
active in the LPAR.  Thus, during a period of high contention
for processor resources, the sum of the dispatch times for
all of the logical processors for an LPAR with a relative
weight of 200 will be twice the sum of the dispatch times of
a second LPAR with a weight of 100.

An LPAR with fewer logical processors defined will receive a
higher proportion of an individual logical processor than an
LPAR with more logical processors defined.  An important
consideration here is that the number of logical processors
defined for an LPAR can limit its total processor utilization
to a value less than that implied by its relative weight.  In
other words, if an LPAR has only one logical processor
defined, it can never receive more then 25 per cent of the
resources of a 3090-400 even if it has a high relative weight
as compared to the weights of any other active LPARs.