6. DATA SOURCES › 6.8 PR/SM LPAR Concepts › 6.8.4 Interpreting PR/SM Data › 6.8.4.1 Meaning of "Dispatch Time"

6.8.4.1 Meaning of "Dispatch Time"

The PR/SM Logical Processor Data section contains the single
most important measurement needed to analyze PR/SM LPAR
system activity:  dispatch time.

Total logical processor dispatch time is the sum of the time
intervals during which the logical processor was dispatched
on a physical processor.  Total dispatch time includes LPAR
management time that is attributable to the specific
partition.  If LPAR management time reporting is in effect,
 effective dispatch time is also reported in this section.
Effective dispatch time does not include LPAR management
time.  The difference between total and effective dispatch
time is the LPAR overhead.

It is important to understand the meaning of the word
"dispatch" in the PR/SM LPAR sense (the meaning is not the
same as when it is used to describe address space activity
within the system).  LPAR dispatch time is accumulated when
the logical processor is available for use by the partition,
regardless of whether the processor is actually busy.  This
time includes wait time if wait-assist is enabled and a
fixed-time-slice value is specified.

In other words, logical processor dispatch time is CPU busy
time only if wait-assist is disabled.  If it is enabled, you
must subtract the value of the CPU wait time recorded in the
CPU Data section from this dispatch time in order to arrive
at CPU busy time.

Also important to understand is that there is no permanent
correspondence between logical processors and physical
processors except for the brief duration of a time slice,
because a ready logical processor can be dispatched on any
available central processor.  RMF may be accumulating
measurements for what it regards as CPU 1, but the actual
address of the central processor assigned as CPU 1 may be any
of those available at the time.

 Individual central processor utilization levels in a PR/SM
LPAR complex cannot be calculated from RMF data.  However, by
adding the dispatch times from all of the active logical
processors in the complex, it is possible to calculate
complex-wide utilization, or average processor busy.

Each PR/SM Logical Processor Data section also contains the
logical processor address and the wait-assist status.  The LP
address is essential when calculating processor utilizations
for wait-enabled partitions because, while the dispatch time
is recorded in the logical processor section, processor wait
time is recorded in the CPU Data section.  The wait-assist
status is available in the form of a bit within a status byte
that also contains indications of a change in the wait-state
status or processor relative share within the measurement
interval.

 The processor relative share represents a mechanism for
 allocating processor resources in a CPC during periods of
 high utilization and contention, or when partition capping is
 in effect.  It is a dimensionless number, the absolute value
 of which is meaningful only when compared to the relative
 share value of the other active logical partitions in the
 complex.  If a partition has dedicated processors, the
 recorded value of the processor relative share is 65,535
 (hexadecimal FFFF).